1. Field of the Invention
The present invention relates to an integrated circuit having at least one digital input and having a first circuit section that has a current-voltage characteristic and that in the absence of an input signal holds a voltage at the input at a defined value, and having a second circuit section that provides a signal that is internal to the circuit and whose state does not directly show itself at an output of the circuit. The invention further relates to a method for testing such an integrated circuit.
2. Description of the Background Art
In this regard, a digital input is understood to be an input with a threshold switch that does not forward an input signal to an internal signal processing unit until the input signal exceeds a predefined threshold. When no input signal is provided to the input, electromagnetic influences can in principle cause voltage variations at the input that exceed the threshold, this, however, is undesirable. The aforementioned circuit section serves to avoid the undesirable states. For example, the circuit section has a current sink that is able to draw a current with a predefined maximum value from the input. The threshold cannot be exceeded until a current flowing into the input is greater than the current of the current sink. Such a current sink, also known as a pull-down current source, holds the voltage at the input to a value below the threshold. In an analogous manner, a pull-up current source holds the voltage above the threshold.
In the operation of integrated circuits, changes occur in the states of internal signals that are not directly reflected in the behavior of the input signals and output signals of the integrated circuit. The question of whether and, if applicable, at what point in time such a state change occurs can be important for functional testing at the end of a manufacturing process. In principle, an internal signal can be provided with its own terminal at which the internal signal can be tapped for test purposes. For a given circuit, however, the number of possible terminals is already limited by considerations of space. Moreover, each terminal constitutes an undesirable input for interfering influences such as ESD pulses.
Another option for evaluating an internal signal resides in the analysis of the input/output signal behavior of the integrated circuit. However, it is problematic in this regard that internal signals may under some circumstances only be reflected in a regular output signal very indirectly and with a long time delay, so that internal signals can only be detected incompletely or with a large expenditure of time in measurement, which can result in a reduced production rate, in particular in the case of final testing on a production line.
A circuit and a method are known from DE 100 64 478 A1, which corresponds to U.S. Pat. No. 6,937,048, which is incorporated herein by reference. This document addresses the problem that measurement pad areas within the circuit, and additional pins that are needed for external measurement of signals, occupy a substantial portion of the total circuit area, particularly for highly integrated circuits. Due to the large fraction of the overall chip area, the resulting fraction of the total cost of a circuit is substantial, which has an adverse economic impact. To remedy this, it is proposed therein for the signals generated by a circuit unit within an integrated circuit which are not measurable at the outputs in normal operation to be switched to the existing signal outputs as test signals for functional testing. To this end, while the supply voltage is present, a specific voltage is applied to at least one signal output of the integrated circuit, thus switching the integrated circuit into a test mode.
However, in the conventional art, when an internal test signal is switched to an output, the regular output signal cannot be obtained at the same time. Tests in which the internal signal and the regular output signal are required can thus only be performed one after the other, increasing the test time.